virtual memory address translation

Writing process is complete page-based virtual memory address translation process management and simulation page fault handling.

编写程序完成页式虚拟存储管理中地址转换过程和模拟缺页中断的处理。

As mentioned before, memory addresses that are referred by a process are virtual addresses and require translation to the physical address.

如前所述，进程所引用的内存地址是虚拟地址，需要将其转换成物理地址。

In order to optimize performance, including speed and the usage of its memory, CPU usually hires a Translation Lookaside Buffer(TLB) to translate the virtual address into physical address.

为了提高CPU的速度和更有效的管理物理内存，一般都采用转换查找缓冲器（TLB）将虚拟地址转换为物理地址。