frequency and phase locked loop

Introduces the basic principle of phase-locked loop and NE564 PLL circuit structure and properties, and the use of phase-locked NE564 demodulating circuit and phase-locked frequency circuit.

介绍了锁相环的基本原理和锁相环ne564的电路结构和性能，及其用ne564构成的锁相解调电路和锁相倍频电路。

Then presented the basic structure, phase model, frequency response and performance analysis for noise and spur, of phase locked loop (PLL).

然后介绍了锁相环(PLL)的基本结构、相位模型、频率响应、噪声及杂散性能。

In the process of signal digital intermediate-frequency received, digital down convertion, frequency tracking of carrier and phase locked loop are the keys.

在信号的中频数字接收过程中，数字下变频、载波频率与相位跟踪是设计的关键所在。